Building a MIPS Single Cycle Datapath - Part 2: Adding I-type Memory Access Instructions

Computer Architecture

Abstract

The activity was designed for use in a Computer Organization & Architecture course that uses MIPS assembly language.  Prior to this activity, students will have learned how to build a MIPS single cycle datapath for R-type instructions. This activity will walk students through the actions performed by each part of the single cycle datapath for MIPS LW and SW data memory access instructions and show the hardware used. The first two models will cover the additional hardware and paths needed to add support for a LW instruction to the R-type datapath.  And the last model will cover the additional paths needed to add support for a SW instruction to the datapath.

After completing this activity, students should be able to:

• Modify the R-type datapath with additional hardware and paths to support executing MIPS I-type LW and SW memory access instructions.
• Describe the datapath that the bits of the MIPS LW and SW instructions will follow when executing on a single cycle CPU, identifying the inputs and outputs of each hardware unit along the way.
• Determine whether MIPS immediate math/logic instructions and MIPS branch instructions can be supported by the modified datapath.

This activity was developed with NSF support through IUSE-1626765. You may request access to this activity via the following link: IntroCS-POGIL Activity Writing Program. 

• Level:  Undergraduate
• Setting:  Classroom
• Activity Type:  Learning Cycle
• Discipline:  Computer Science
• Course:  Computer Architecture
• Keywords:  datapath, single cycle, MIPS, memory, R-type